Combined Random Number Generator on Programmable Logic Integrated Circuits
https://doi.org/10.35596/1729-7648-2023-29-1-36-47
Abstract
The paper shows the practical possibility of implementing random number generators on field programmable gate arrays (FPGA) by combining various physically unclonable functions. A compact and scalable scheme of a digital random number source based on an asynchronous flip-flop of the D-type is proposed, which combines the characteristics of a static memory physically unclonable functions and a ring oscillator physically unclonable functions. Unlike existing random number generators, the proposed scheme can be used to solve the problem of unclonable identification of digital devices. The article presents experimental results obtained by the proposed generator circuit based on the FPGA Xilinx Zynq. The main modes of operation, probabilistic and statistical characteristics of numerical sequences, generated by the proposed scheme are described.
About the Author
A. A. Ivaniuk
Belarusian State University of Informatics and Radioelectronics
Belarus
Belarus
Ivaniuk A. A., Dr. of Sci. (Eng.), Associate Professor,
Professor at the Comp. Sci. Department, Head of the
Joint Educational Laboratory “SK Hynix memory solutions Eastern Europe”
220013, Minsk, P. Brovki St., 6
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Review
For citations:
Ivaniuk A.A. Combined Random Number Generator on Programmable Logic Integrated Circuits. Digital Transformation. 2023;29(1):36-47. (In Russ.) https://doi.org/10.35596/1729-7648-2023-29-1-36-47
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